Automated Verification of Signalling Principles in Railway Interlocking Systems

DOI10.1016/j.entcs.2009.08.015zbMath1335.68140OpenAlexW2160974783WikidataQ59556946 ScholiaQ59556946MaRDI QIDQ5178972

Karim Kanso, Anton Setzer, Faron Moller

Publication date: 18 March 2015

Published in: Electronic Notes in Theoretical Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.entcs.2009.08.015

zbMATH Keywords

verificationsafety propertiesautomated theorem provingSAT solversrailway interlocking systemsladder logicsignalling principles

Mathematics Subject Classification ID

Control/observation systems involving computers (process control, etc.) (93C83) Logic in computer science (03B70) Specification and verification (program logics, model checking, etc.) (68Q60)

Related Items (2)

Encapsulating formal methods within domain specific languages: a solution for verifying railway scheme plans ⋮ A light-weight integration of automated and interactive theorem proving

Uses Software

• OKlibrary

Cites Work

• Present and Future of Practical SAT Solving
• Unnamed Item
• Unnamed Item

This page was built for publication: Automated Verification of Signalling Principles in Railway Interlocking Systems