A New Representation for Faults in Combinational Digital Circuits

DOI10.1109/TC.1972.5009041zbMath0274.94040MaRDI QIDQ5183407

Gernot Metze, Donald R. Schertz

Publication date: 1972

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Related Items (2)

An algorithm to generate complete test sets for stuck-at faults in combinational logic circuits ⋮ Multistep fault-collapsing method for spectral signature detecting in combinational networks

This page was built for publication: A New Representation for Faults in Combinational Digital Circuits