TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration
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Publication:5211743
DOI10.1109/TC.2019.2917208OpenAlexW2946808089WikidataQ127874099 ScholiaQ127874099MaRDI QIDQ5211743
Ing-Chao Lin, Hsiang-Yun Cheng, Jing-Yuan Luo, Da-Wei Chang
Publication date: 28 January 2020
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tc.2019.2917208
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