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Floorplan Optimization of Fat-Tree-Based Networks-on-Chip for Chip Multiprocessors - MaRDI portal

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Floorplan Optimization of Fat-Tree-Based Networks-on-Chip for Chip Multiprocessors

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Publication:5268166

DOI10.1109/TC.2012.295zbMATH Open1364.94838OpenAlexW2156667343MaRDI QIDQ5268166

Author name not available (Why is that?)

Publication date: 20 June 2017

Published in: (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.2012.295




Mathematics Subject Classification ID

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