Computing Accurate Performance Bounds for Best Effort Networks-on-Chip
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Publication:5274320
DOI10.1109/TC.2011.240zbMath1365.94706OpenAlexW2005221922MaRDI QIDQ5274320
Luca Benini, Srinivasan Murali, Dara Rahmati, Giovanni De Micheli, Federico Angiolini, Hamid Sarbazi-Azad
Publication date: 12 July 2017
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tc.2011.240
Applications of design theory to circuits and networks (94C30) Mathematical problems of computer architecture (68M07)
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