Analysis of the PLL Jitter Due to Power/Ground and Substrate Noise
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Publication:5362885
DOI10.1109/TCSI.2004.838240zbMath1371.94501MaRDI QIDQ5362885
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Publication date: 4 October 2017
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)
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