Bit-serial systolic divider and multiplier for finite fields GF(2/sup m/)
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Publication:5375359
DOI10.1109/12.156540zbMath1397.65331OpenAlexW2099711671MaRDI QIDQ5375359
Vijay K. Bhargava, M. Anwarul Hasan
Publication date: 14 September 2018
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/12.156540
Mathematical problems of computer architecture (68M07) Numerical algorithms for computer arithmetic, etc. (65Y04)
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