On mapping algorithms to linear and fault-tolerant systolic arrays
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Publication:5375468
DOI10.1109/12.21135zbMath1395.68018OpenAlexW1983012728MaRDI QIDQ5375468
Yu-Chen Tsai, V. K. Prasanna Kumar
Publication date: 14 September 2018
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/12.21135
Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Mathematical problems of computer architecture (68M07)
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