Verification by Parallelization of Parametric Code

DOI10.1007/978-3-540-75939-3_10zbMath1122.68037OpenAlexW1513365661MaRDI QIDQ5426003

Reiner Hähnle, Tobias Gedell

Publication date: 15 November 2007

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-75939-3_10

zbMATH Keywords

formal software verificationautomated first-order reasoningparallelizable loopssymbolic dependence analysis

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.) (68N30)

Uses Software

• Spec#
• ESC/Java
• NQTHM

Cites Work

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• Time and Parallel Processor Bounds for Fortran-Like Loops
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• Sequential, Parallel, and Quantified Updates of First-Order Structures
• Rippling: Meta-Level Guidance for Mathematical Reasoning
• Theorem Proving in Higher Order Logics
• Programming Languages and Systems
• Theoretical Aspects of Computing - ICTAC 2004
• Integrated Formal Methods