Efficient FPGA-Based Karatsuba Multipliers for Polynomials over ${\mathbb F}_{2}$

DOI10.1007/11693383_25zbMath1151.94594OpenAlexW1566706564MaRDI QIDQ5426203

Jamshid Shokrollahi, Joachim von zur Gathen

Publication date: 15 November 2007

Published in: Selected Areas in Cryptography (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/11693383_25

zbMATH Keywords

fast multiplicationFPGAKaratsuba methodhardwareasymptotically fast algorithmsFinite field arithmetic

Mathematics Subject Classification ID

Algebraic coding theory; cryptography (number-theoretic aspects) (11T71) Cryptography (94A60)

Related Items

Efficient multiplier based on hybrid approach for Toeplitz matrix-vector product ⋮ Explicit Formulas for Efficient Multiplication in $\mathbb{F}_{3^{6m}}$ ⋮ A survey of some recent bit-parallel \(\mathrm{GF}(2^n)\) multipliers ⋮ A three-term Karatsuba multiplier for a special class of trinomials