An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm

DOI10.1007/978-3-540-78440-1_13zbMath1162.94369OpenAlexW1606216463MaRDI QIDQ5445455

Kris Gaj, Tarek El-Ghazawi, Soonhak Kwon, Miaoqing Huang

Publication date: 5 March 2008

Published in: Public Key Cryptography – PKC 2008 (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-78440-1_13

zbMATH Keywords

Montgomery MultiplicationField Programmable Gate ArraysMWR2MM Algorithm

Mathematics Subject Classification ID

Cryptography (94A60) Authentication, digital signatures and secret sharing (94A62)

Cites Work

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• Modular Multiplication Without Trial Division
• A method for obtaining digital signatures and public-key cryptosystems

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