Revisiting Resistance Speeds Up I/O-Efficient LTL Model Checking

DOI10.1007/978-3-540-78800-3_5zbMath1134.68397OpenAlexW1829451333MaRDI QIDQ5458320

M. Weber, P. Šimeček, Jiří Barnat, Luboš Brim

Publication date: 11 April 2008

Published in: Tools and Algorithms for the Construction and Analysis of Systems (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-78800-3_5

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Related Items (4)

Flash memory efficient LTL model checking ⋮ The sweep-line state space exploration method ⋮ Semi-external LTL Model Checking ⋮ Survey on Directed Model Checking

Uses Software

• DiVinE
• STXXL
• BEEM

Cites Work

• Formal Methods in Computer-Aided Design
• Model Checking Software
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