Safe reasoning with logic LTS

DOI10.1016/J.TCS.2011.03.015zbMath1216.68193OpenAlexW1997172052MaRDI QIDQ549200

Walter Vogler, Gerald Lüttgen

Publication date: 7 July 2011

Published in: Theoretical Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.tcs.2011.03.015

zbMATH Keywords

temporal logicsafety propertieslabelled transition systemsheterogeneous specificationmodal refinementready simulation

Mathematics Subject Classification ID

Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85) Temporal logic (03B44)

Related Items (7)

ACTL for modal interface automata ⋮ Processes with infinite liveness requirements ⋮ Axiomatizing Lüttgen \& Vogler's ready simulation for finite processes in \(\mathrm{CLL}_{R}\) ⋮ On recursive operations over logic LTS ⋮ Safe Reasoning with Logic LTS ⋮ Encoding safety in \(\mathrm{CLL}_R\) ⋮ On the greatest solution of equations in \(\mathrm{CLL}_R\)

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