Correct Hardware Design and Verification Methods

DOI10.1007/11560548zbMath1159.68330OpenAlexW2483257485MaRDI QIDQ5493247

João P. Marques-Silva

Publication date: 20 October 2006

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/11560548

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07)

Related Items (4)

Optimization techniques for Craig interpolant compaction in unbounded model checking ⋮ Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking ⋮ Approximation Refinement for Interpolation-Based Model Checking ⋮ Interpolant Learning and Reuse in SAT-Based Model Checking

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