STABILITY AND BIFURCATIONS OF PHASE-LOCKED LOOPS FOR DIGITAL SIGNAL PROCESSORS

DOI10.1142/S0218127405012703zbMath1089.94049OpenAlexW2115233751MaRDI QIDQ5702218

S. M. Seledzhi, Gennady Alekseevich Leonov

Publication date: 1 November 2005

Published in: International Journal of Bifurcation and Chaos (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1142/s0218127405012703

zbMATH Keywords

Stabilityphase-locked loopsprocessorclock-skewcontinuous PLLdiscrete PLL

Mathematics Subject Classification ID

Bifurcation theory for ordinary differential equations (34C23) Signal theory (characterization, reconstruction, filtering, etc.) (94A12) Stability of solutions to ordinary differential equations (34D20) Analytic circuit theory (94C05)

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