Controller Synthesis for MTL Specifications

DOI10.1007/11817949_30zbMath1151.68471OpenAlexW1936754331MaRDI QIDQ5756610

Fabrice Chevalier, Patricia Bouyer, Laura Bozzelli

Publication date: 4 September 2007

Published in: CONCUR 2006 – Concurrency Theory (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/11817949_30

Mathematics Subject Classification ID

Formal languages and automata (68Q45) Design techniques (robust design, computer-aided design, etc.) (93B51) Specification and verification (program logics, model checking, etc.) (68Q60) Temporal logic (03B44)

Related Items (3)

Real-time policy enforcement with metric first-order temporal logic ⋮ Efficient controller synthesis for a fragment of \(\mathrm{MTL}_{0,\infty}\) ⋮ Realizability of Real-Time Logics

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