Sanity Checks in Formal Verification
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Publication:5756614
DOI10.1007/11817949_3zbMath1151.68485OpenAlexW1583654333MaRDI QIDQ5756614
Publication date: 4 September 2007
Published in: CONCUR 2006 – Concurrency Theory (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/11817949_3
Specification and verification (program logics, model checking, etc.) (68Q60) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85) Temporal logic (03B44)
Related Items (10)
Extracting unsatisfiable cores for LTL via temporal resolution ⋮ Analysing sanity of requirements for avionics systems ⋮ Automata Theory and Model Checking ⋮ Inherent Vacuity in Lattice Automata ⋮ Linear temporal logic symbolic model checking ⋮ Enhancing unsatisfiable cores for LTL with information on temporal relevance ⋮ Beyond vacuity: towards the strongest passing formula ⋮ Vacuity in practice: temporal antecedent failure ⋮ Timed vacuity ⋮ Before and after vacuity
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