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Reconfigurable computing for digital signal processing: A survey

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Publication:5943324
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DOI10.1023/A:1008155020711zbMath0990.68595MaRDI QIDQ5943324

Russell Tessier, Wayne Burleson

Publication date: 9 September 2001

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)


zbMATH Keywords

VLSI technology


Mathematics Subject Classification ID

Computing methodologies and applications (68U99) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Computer system organization (68M99)


Related Items (4)

Formalization of Data Flow Computing and a Coinductive Approach to Verifying Flowware Synthesis ⋮ Hardware-in-the-Loop Simulations for FPGA-based Digital Control Design ⋮ Design and implementation of flexible resampling mechanism for high-speed parallel particle filters ⋮ Reconfigurable coprocessor for multimedia application domain


Uses Software

  • Ptolemy






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