Design methodology of a low-energy reconfigurable single-chip DSP system

DOI10.1023/A:1008159121620zbMath0990.68597OpenAlexW1559004190MaRDI QIDQ5943326

Varghese George, Arthur Abnous, Hui Zhang, Vandana Prabhu, Marlene Wan, Jan Rabaey, Martin Benes

Publication date: 14 August 2002

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1008159121620

zbMATH Keywords

voice processingdigital signal processingreconfigurable architecture

Mathematics Subject Classification ID

Computing methodologies and applications (68U99) Computer system organization (68M99)

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