Application of reconfigurable computing to a high performance front-end radar signal processor

DOI10.1023/A:1008111205690zbMath0990.68598OpenAlexW2138318816MaRDI QIDQ5943327

Tyler J. Moeller, Ken Teitelbaum, David R. Martinez

Publication date: 14 August 2002

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1008111205690

zbMATH Keywords

VLSI radar signal processor

Mathematics Subject Classification ID

Computing methodologies and applications (68U99) Computer system organization (68M99)

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