A parallel architecture for the 2-D discrete wavelet transform with integer lifting scheme

DOI10.1023/A:1011161423836zbMath0985.68099OpenAlexW1584392810MaRDI QIDQ5947743

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Publication date: 19 February 2002

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1011161423836

zbMATH Keywords

lifting schemewavelet transformVLSI

Mathematics Subject Classification ID

Numerical methods for wavelets (65T60) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Computer system organization (68M99)

Related Items (1)

A survey on lifting-based discrete wavelet transform architectures

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