Scalable linear array architecture with data-driven control for ultrahigh-speed vector quantization

DOI10.1023/A:1011169625653zbMath0983.68263OpenAlexW2102667565MaRDI QIDQ5947747

Ding-Ming Kwai, Behrooz Parhami

Publication date: 21 April 2002

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1011169625653

zbMATH Keywords

VLSIlinear processor array architecturereal-time image compression

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Computer system organization (68M99)

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