A parallel VLSI video/communication controller

DOI10.1023/A:1011121709723zbMATH Open0987.68513OpenAlexW1860281027MaRDI QIDQ5947748

D. Reisis, G. Synnefakis, G. Konstantoulakis, Gr. Doumenis, G. Korinthios, G. Lykakis

Publication date: 18 June 2002

Published in: Journal of VLSI signal processing systems for signal, image and video technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1011121709723

zbMATH Keywords

video communicationVLSI architecture

Mathematics Subject Classification ID

Computer system organization (68M99)

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