Design of a linear systolic array for computing modular multiplication and squaring in \(\text{GF}(2^m)\)

DOI10.1016/S0898-1221(01)00147-XzbMath0994.68065OpenAlexW2025569319MaRDI QIDQ5948833

Keon-Jik Lee, Kee-Young Yoo, Won-Ho Lee

Publication date: 12 November 2001

Published in: Computers \& Mathematics with Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s0898-1221(01)00147-x

zbMATH Keywords

modular exponentiationMontgomery modular multiplication algorithmsystolic arrayVLSI implementation

Mathematics Subject Classification ID

Symbolic computation and algebraic computation (68W30) Cryptography (94A60) Data encryption (aspects in computer science) (68P25) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Mathematical problems of computer architecture (68M07)

Cites Work

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• Systolic Multipliers for Finite Fields GF(2^m)
• The VLSI Implementation of a Reed—Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm
• Modular Multiplication Without Trial Division
• VLSI Architectures for Computing Multiplications and Inverses in GF(2^m)
• A public key cryptosystem and a signature scheme based on discrete logarithms
• New directions in cryptography
• A Cellular-Array Multiplier for GF(2^m)
• Computation with finite fields

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