A specification refinement methodology for power efficient partitioning of data-dominated algorithms within performance constraints

DOI10.1023/A:1026545832742zbMath0987.68622OpenAlexW1576390208MaRDI QIDQ5960765

Francky V. M. Catthoor, Nikolaos Zervas, H. De Man, K. Danckaert, K. Masselos, Costas Goutis

Publication date: 15 April 2002

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1026545832742

zbMATH Keywords

code transformationsperformance constraintsprocessor partitioning

Mathematics Subject Classification ID

Computing methodologies and applications (68U99) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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