A hardware architecture for the LZW compression and decompression algorithms based on parallel dictionaries

DOI10.1023/A:1026559601791zbMath0987.68623OpenAlexW111336922MaRDI QIDQ5960769

Ming-Bo Lin

Publication date: 26 June 2002

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1026559601791

zbMATH Keywords

compressiondecompressionLZW algorithmPDLZW algorithm

Mathematics Subject Classification ID

Computing methodologies and applications (68U99) Computer system organization (68M99)

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