Improved asymptotically optimal error correcting codes for avoidance crosstalk type-IV on-chip data buses
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Publication:6044741
DOI10.1007/s40314-023-02284-zOpenAlexW4363672791MaRDI QIDQ6044741
Bernardo Gabriel Rodrigues, Muhammad Ajmal, Masood Ur Rehman
Publication date: 22 May 2023
Published in: Computational and Applied Mathematics (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s40314-023-02284-z
crosstalkleave graph\(\text{BSA}^\ast\)balanced sampling plans avoiding adjacent unit (BSA)incomplete group divisible design (IGDD)
Triple systems (05B07) Combinatorial codes (94B25) Combinatorial aspects of packing and covering (05B40)
Cites Work
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- Optimal low-power coding for error correction and crosstalk avoidance in on-chip data buses
- Langford sequences: Perfect and hooked
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- Generalized polygonal designs with block size \(3\) and \(\lambda =1\)
- The spectrum of cyclic BSEC with block size three
- The spectrum ofBSA(v, 3, λ; α) with α = 2,3
- Joint Crosstalk-Avoidance and Error-Correction Coding for Parallel Data Buses
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