Power-aware BTB for modern processors

DOI10.1016/J.COMPELECENG.2008.04.008zbMath1208.68103OpenAlexW2057283003MaRDI QIDQ605704

Kaveh Jokar Deris, Amirali Baniasadi

Publication date: 25 November 2010

Published in: Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.compeleceng.2008.04.008

zbMATH Keywords

low-power designbranch target bufferpower-aware architectures

Mathematics Subject Classification ID

Computer system organization (68M99)

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