Hybrid architecture and VLSI implementation of the Cosine-Fourier-Haar transforms

DOI10.1007/S00034-010-9200-XzbMath1200.94020OpenAlexW2089657421MaRDI QIDQ607547

Sumit K. Garg

Publication date: 22 November 2010

Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s00034-010-9200-x

zbMATH Keywords

Fourier transformVLSIhybrid architectureCosine transformHaar wavelet transform

Mathematics Subject Classification ID

Nontrigonometric harmonic analysis involving wavelets and other special systems (42C40) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Laplace transform (44A10) Application of orthogonal and other special functions (94A11)

Cites Work

• Unnamed Item
• Efficient VLSI implementations of fast multiplierless approximated DCT using parameterized hardware modules for silicon intellectual property design

This page was built for publication: Hybrid architecture and VLSI implementation of the Cosine-Fourier-Haar transforms