Hardware implementation of code converters designed to reduce the length of binary encoded words

DOI10.1134/S0361768823040023OpenAlexW4385343370MaRDI QIDQ6094420

P. N. Bibilo

Publication date: 13 September 2023

Published in: Programming and Computer Software (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1134/s0361768823040023

zbMATH Keywords

VLSIcode converterdisjunctive normal formbinary decision diagramVHDLShannon expansiondigital logic synthesissystem of Boolean functions

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Mathematical problems of computer architecture (68M07) Boolean functions (06E30) Switching theory, applications of Boolean algebras to circuits and networks (94C11)

Cites Work

• New Data Structures and Algorithms for Logic Synthesis and Verification
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