Synthesizable high level hardware descriptions

DOI10.1007/S00354-008-0093-1zbMath1206.68073OpenAlexW2115635603MaRDI QIDQ609757

Jennifer Gillenwater, Cherif Salama, Walid Taha, Angela Yun Zhu, Gregory Malecha

Publication date: 1 December 2010

Published in: New Generation Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s00354-008-0093-1

zbMATH Keywords

code generationhardware description languagesstatically typed two-level languagessynthesizabilityVerilog elaboration

Mathematics Subject Classification ID

Theory of programming languages (68N15) Computer system organization (68M99)

Cites Work

• The lambda calculus. Its syntax and semantics. Rev. ed.
• Two-level semantics and code generation
• A partial evaluator for the untyped lambda-calculus

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