Schedulability analysis and task mapping for real-time on-chip communication
From MaRDI portal
Publication:613788
DOI10.1007/S11241-010-9108-3zbMath1213.68153OpenAlexW1979188666MaRDI QIDQ613788
Publication date: 22 December 2010
Published in: Real-Time Systems (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s11241-010-9108-3
Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Computer system organization (68M99)
Related Items (3)
Real-time analysis of priority-preemptive NoCs with arbitrary buffer sizes and router delays ⋮ Architecture aware semi partitioned real-time scheduling on multicore platforms ⋮ Real-time application mapping for many-cores using a limited migrative model
Uses Software
This page was built for publication: Schedulability analysis and task mapping for real-time on-chip communication