DC gain analysis of scaled CMOS op amp in sub-100 nm technology nodes: A research based on channel length modulation effect
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Publication:615254
DOI10.1007/S12204-009-0613-2zbMath1202.94228OpenAlexW2029910351MaRDI QIDQ615254
Jian-Fei Jiang, Qi-Yu Cai, Jia Cheng
Publication date: 5 January 2011
Published in: Journal of Shanghai Jiaotong University (Science) (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s12204-009-0613-2
modelingsimulationanalog circuitscomplementary metal-oxide-semiconductor (CMOS) analog integrated circuitsoperational amplifierstechnology node
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