Loop summarization with rational vector addition systems

DOI10.1007/978-3-030-25543-5_7arXiv1905.06495OpenAlexW2956274457MaRDI QIDQ6154875

Zachary Kincaid, Jake Silverman

Publication date: 16 February 2024

Published in: Computer Aided Verification (Search for Journal in Brave)

Full work available at URL: https://arxiv.org/abs/1905.06495

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

Related Items (1)

Reflections on termination of linear loops

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