FSMs state encoding targeting at logic level minimization

zbMath1203.03055MaRDI QIDQ620063

J. Kulisz, Robert Czerwinski, Dariusz Kania

Publication date: 19 January 2011

Published in: Bulletin of the Polish Academy of Sciences. Technical Sciences (Search for Journal in Brave)

Full work available at URL: http://bulletin.pan.pl/(54-4)479.html

zbMATH Keywords

complex programmable logic devices (CPLD)finite state machines (FSM)programmable array logic (PAL)state assignment

Mathematics Subject Classification ID

Automata and formal grammars in connection with logical questions (03D05)

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Synthesis of finite state machines for CPLDs ⋮ Structural decomposition as a tool for the optimization of an FPGA-based implementation of a Mealy FSM

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