Quantum circuits for high-degree and half-multiplication for post-quantum analysis
From MaRDI portal
Publication:6547862
DOI10.1007/978-981-97-1235-9_8MaRDI QIDQ6547862
Howon Kim, Rini Wisnu Wardhani, Dedy Septono Catur Putranto
Publication date: 31 May 2024
quantumpost-quantum cryptographycorrelation power analysisToom-Cookhigh-degree and half-multiplication
Cryptography (94A60) Data encryption (aspects in computer science) (68P25) Computer security (68M25)
Cites Work
- Title not available (Why is that?)
- Title not available (Why is that?)
- Title not available (Why is that?)
- Quantum circuits for \(\mathbb F_{2^n}\)-multiplication with subquadratic gate count
- Space- and time-efficient polynomial multiplication
- Fiat-Shamir with Aborts: Applications to Lattice and Factoring-Based Signatures
- Time/Space Trade-Offs for Reversible Computation
- Improved reversible and quantum circuits for Karatsuba-based integer multiplication.
- Cryptographic Hardware and Embedded Systems - CHES 2004
- Towards Optimal Toom-Cook Multiplication for Univariate and Multivariate Polynomials in Characteristic 2 and 0
- On the Minimum Computation Time of Functions
- The Fast Fourier Transform in a Finite Field
This page was built for publication: Quantum circuits for high-degree and half-multiplication for post-quantum analysis
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q6547862)
