FPGA architecture and implementation of sparse matrix-vector multiplication for the finite element method

DOI10.1016/j.cpc.2007.11.014zbMath1196.65084OpenAlexW2164261830MaRDI QIDQ710265

D. Kharzeev

Publication date: 18 October 2010

Published in: Computer Physics Communications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.cpc.2007.11.014

zbMATH Keywords

FEMFPGA

Mathematics Subject Classification ID

Computational methods for sparse matrices (65F50) Complexity and performance of numerical algorithms (65Y20)

Uses Software

• SPAR

Cites Work

• Parallel solution of linear systems with striped sparse matrices
• Processor-efficient sparse matrix-vector multiplication
• Determination of Stripe Structures for Finite Element Matrices
• SPAR: a new architecture for large finite element computations
• Unnamed Item

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