Optimal wafer cutting in shuttle layout problems

DOI10.1007/s10878-009-9284-zzbMath1228.90099OpenAlexW2127273143WikidataQ58826384 ScholiaQ58826384MaRDI QIDQ719028

Lasse Nisted, David Pisinger, Avri Altman

Publication date: 27 September 2011

Published in: Journal of Combinatorial Optimization (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10878-009-9284-z

zbMATH Keywords

column generationcutting problemsemiconductor layout problemvertex-weighted clique problem

Mathematics Subject Classification ID

Applications of mathematical programming (90C90) Combinatorial optimization (90C27)

Related Items (1)

Timed route approaches for large multi-product multi-step capacitated production planning problems

Cites Work

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• Chips on wafers, or packing rectangles into grids
• An exact algorithm for the maximum clique problem
• A fast algorithm for the maximum clique problem
• A Linear Programming Approach to the Cutting-Stock Problem
• On the Maximum Weight Clique Problem

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