Cache coherence requirements for interprocess rendezvous
DOI10.1007/BF01407863zbMATH Open0713.68007OpenAlexW2155222030MaRDI QIDQ750130
Trevor N. Mudge, Russell M. Clapp, Donald C. Winsor
Publication date: 1990
Published in: International Journal of Parallel Programming (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/bf01407863
Network design and communication in computer systems (68M10) Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Theory of programming languages (68N15)
Cites Work
Related Items (1)
Uses Software
Recommendations
- Synchronization coherence: a transparent hardware mechanism for cache coherence and fine-grained synchronization 👍 👎
- Software-controlled cache coherence protocol for multicache systems 👍 👎
- Hardware–Software Coherence Protocol for the Coexistence of Caches and Local Memories 👍 👎
- Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems 👍 👎
- Deriving efficient cache coherence protocols through refinement 👍 👎
This page was built for publication: Cache coherence requirements for interprocess rendezvous
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q750130)