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On area-efficient drawings of rectangular duals for VLSI floor-plan

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Publication:802889
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DOI10.1007/BF01582878zbMath0726.68061OpenAlexW1499103390MaRDI QIDQ802889

Isao Shirakawa, Shuji Tsukiyama, Shoji Shinoda, Katsunori Tani

Publication date: 1991

Published in: Mathematical Programming. Series A. Series B (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf01582878


zbMATH Keywords

floor-planrectangular duallower bound estimationVLSI-CAD


Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Applications of mathematical programming (90C90) Graph theory (including graph drawing) in computer science (68R10) Circuits, networks (94C99)


Related Items (5)

On mathematical optimization for the visualization of frequencies and adjacencies as rectangular maps ⋮ Rectangular grid drawings of plane graphs ⋮ Rectangular grid drawings of plane graphs ⋮ Rectangular drawings of plane graphs without designated corners ⋮ Octagonal drawings of plane graphs with prescribed face areas



Cites Work

  • Unnamed Item
  • Optimal orientations of cells in slicing floorplan designs
  • Floorplans, planar graphs, and layouts
  • Rectangular dualization and rectangular dissections


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