Fault-tolerant and flexible interconnection of multiple processors

DOI10.1016/0020-0190(88)90201-3zbMath0734.68017OpenAlexW2034231907MaRDI QIDQ811113

N. E. Zubov

Publication date: 1988

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0190(88)90201-3

zbMATH Keywords

fault tolerancemultiprocessing

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10)

Related Items (1)

A deadlock-free communication kernel for loop architecture

Cites Work

• Unnamed Item
• Unnamed Item
• Unnamed Item
• On a Class of Multistage Interconnection Networks
• Communicating sequential processes

This page was built for publication: Fault-tolerant and flexible interconnection of multiple processors