On the cost of ASIC hardware crackers: a SHA-1 case study

DOI10.1007/978-3-030-75539-3_27OpenAlexW3160754115MaRDI QIDQ826307

Anupam Chattopadhyay, Mustafa Khairallah, Zakaria Najm, Vesselin Velichkov, Thomas Peyrin, Gaëtan Leurent

Publication date: 20 December 2021

Full work available at URL: https://hal.inria.fr/hal-03529193/file/article.pdf

zbMATH Keywords

cryptanalysishash functionsbirthday problemASIC\texttt{SHA-1}

Mathematics Subject Classification ID

Cryptography (94A60) Data encryption (aspects in computer science) (68P25)

Cites Work

• Parallel collision search with cryptanalytic applications
• The first collision for full SHA-1
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• Freestart Collision for Full SHA-1
• The Simon and Speck Block Ciphers on AVR 8-Bit Microcontrollers
• Biclique Cryptanalysis of the Full AES
• Practical Free-Start Collision Attacks on 76-step SHA-1
• Hash Functions and the (Amplified) Boomerang Attack
• Monte Carlo Methods for Index Computation (mod p)
• New Collision Attacks on SHA-1 Based on Optimal Joint Local-Collision Analysis
• Cryptanalysis with COPACOBANA