Optimization of a logic circuit implementing a Moore automaton in CPLD basis

DOI10.1007/S10559-009-9141-1zbMath1185.68379OpenAlexW2071063605MaRDI QIDQ844376

S. A. Tsololo, L. A. Titarenko, Alexander Barkalov

Publication date: 19 January 2010

Published in: Cybernetics and Systems Analysis (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10559-009-9141-1

zbMATH Keywords

synthesispseudoequivalent stateMoore automatonCPLDlogic circuitPAL macrocell

Mathematics Subject Classification ID

Formal languages and automata (68Q45)

Related Items (1)

Optimizing the combined automation scheme in the ASIS basis

Cites Work

• Principles of logic optimization for a Moore microprogrammed automaton
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