Coverage metrics for temporal logic model checking
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Publication:853721
DOI10.1007/s10703-006-0001-6zbMath1105.68075OpenAlexW2019873882MaRDI QIDQ853721
Hana Chockler, Moshe Y. Vardi, Orna Kupferman
Publication date: 17 November 2006
Published in: Formal Methods in System Design (Search for Journal in Brave)
Full work available at URL: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.16.1552
Related Items (3)
Incremental design-space model checking via reusable reachable state approximations ⋮ Towards a notion of unsatisfiable and unrealizable cores for LTL ⋮ Vacuity in practice: temporal antecedent failure
Uses Software
Cites Work
- An automata-theoretic approach to branching-time model checking
- Correct Hardware Design and Verification Methods
- Correct Hardware Design and Verification Methods
- Computer Aided Verification
- Efficient detection of vacuity in temporal model checking
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