Delay optimization of linear depth Boolean circuits with prescribed input arrival times

DOI10.1016/j.jda.2005.06.006zbMath1130.94338OpenAlexW2025635553MaRDI QIDQ866541

Jürgen Werber, Dieter Rautenbach, Christian Szegedy

Publication date: 14 February 2007

Published in: Journal of Discrete Algorithms (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.jda.2005.06.006

zbMATH Keywords

delayVLSI designdepthcircuitcomputer arithmeticstraight-line program

Mathematics Subject Classification ID

Related Items (4)

The delay of circuits whose inputs have specified arrival times ⋮ Fast prefix adders for non-uniform input arrival times ⋮ On the cost of optimal alphabetic code trees with unequal letter costs ⋮ Constructing depth-optimum circuits for adders and \textsc{And}-\textsc{Or} paths

Cites Work

• The delay of circuits whose inputs have specified arrival times
• Parallel Prefix Computation
• On the Time Required to Perform Addition
• On the Addition of Binary Numbers
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