Two dimensional processor array with a reconfigurable bus system is at least as powerful as CRCW model

DOI10.1016/0020-0190(90)90182-WzbMath0703.68041OpenAlexW2084386794MaRDI QIDQ916359

Gen-Huey Chen, Biing-Feng Wang

Publication date: 1990

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0190(90)90182-w

zbMATH Keywords

computational complexityprocessor arraySIMDreconfigurable busCRCW shared-memory computerMIMD

Mathematics Subject Classification ID

Related Items (9)

Multiple search problem on reconfigurable meshes ⋮ Simulating shared memory in real time: On the computation power of reconfigurable architectures ⋮ Relating the power of the multiple associative computing (MASC) model to that of reconfigurable bus-based models ⋮ Fast algorithms for lowest common ancestors on a processor array with reconfigurable buses ⋮ Simulations between two reconfigurable mesh models ⋮ COLLAPSING THE HIERARCHY OF PARALLEL COMPUTATIONAL MODELS ⋮ Optimal simulation of multidimensional reconfigurable meshes by two- dimensional reconfigurable meshes ⋮ Simulating the CRCW PRAM on reconfigurable networks ⋮ Sorting and computing convex hulls on processor arrays with reconfigurable bus systems

Cites Work

• Constant time sorting on a processor array with a reconfigurable bus system
• Parallel computation and conflicts in memory access
• Efficient parallel convex hull algorithms
• Ultracomputers
• Bus automata and immediate languages

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