Mathematical Research Data Initiative
Main page
Recent changes
Random page
Help about MediaWiki
Create a new Item
Create a new Property
Merge two items
In other projects
Discussion
View source
View history
Purge
English
Log in

Efficient address generation in a parallel processor

From MaRDI portal
Publication:917271
Jump to:navigation, search

DOI10.1016/0020-0190(90)90078-CzbMath0704.68009OpenAlexW2090048923MaRDI QIDQ917271

De-Lei Lee

Publication date: 1990

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0190(90)90078-c


zbMATH Keywords

parallel processormemory address generationparallel memory system


Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Computer system organization (68M99)





Cites Work

  • Access and Alignment of Data in an Array Processor
  • Theoretical Limitations on the Efficient Use of Parallel Memories
  • The Organization and Use of Parallel Memories




This page was built for publication: Efficient address generation in a parallel processor

Retrieved from "https://portal.mardi4nfdi.de/w/index.php?title=Publication:917271&oldid=12880614"
Tools
What links here
Related changes
Special pages
Printable version
Permanent link
Page information
MaRDI portal item
This page was last edited on 30 January 2024, at 17:10.
Privacy policy
About MaRDI portal
Disclaimers
Imprint
Powered by MediaWiki