MLMIN: a multicore processor and parallel computer network topology for multicast

DOI10.1016/J.COR.2007.02.004zbMath1278.68040OpenAlexW2045018790MaRDI QIDQ925823

Dietmar Tutsch, Günter Hommel

Publication date: 23 May 2008

Published in: Computers \& Operations Research (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.cor.2007.02.004

zbMATH Keywords

performancecostmulticastingnetwork-on-chipmulticorepacket sizemultistage interconnection networks

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Uses Software

• Akaroa
• CINSim
• MINSimulate

Cites Work

• A unified theory of interconnection network structure
• Performance Analysis of Network Architectures

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