Multiplexer-based bit-parallel systolic multipliers over GF(\(2^m)\)

DOI10.1016/J.COMPELECENG.2007.09.004zbMath1154.68036OpenAlexW2010774922MaRDI QIDQ937456

Chiou-Yng Lee

Publication date: 15 August 2008

Published in: Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.compeleceng.2007.09.004

zbMATH Keywords

systolic arraycut-set systolization techniquemodified Booth's algorithmMSB-first multiplication schememultiplexer-based arrayoptimum primitive polynomial

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Computer system organization (68M99)

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