Phase error dynamics of a class of DPLLs in presence of cochannel interference

DOI10.1016/J.SIGPRO.2004.12.005zbMath1148.94424OpenAlexW2065299568MaRDI QIDQ956273

B. C. Sarkar, Tanmoy Banerjee

Publication date: 25 November 2008

Published in: Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.sigpro.2004.12.005

zbMATH Keywords

stability criteriacochannel interferencedigital phase locked loop (DPLL)

Mathematics Subject Classification ID

Channel models (including quantum) in information and communication theory (94A40)

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